AN 669: Drive-On-Chip Design Example for Cyclone V Devices

ID 683466
Date 5/15/2022
Public
Document Table of Contents

13. Document Revision History for AN 669: Drive-on-Chip Reference Design

Table 40.  Document Revision History
Date Version Changes
2022.05.15 4.0
  • Removed support for:
    • Intel MAX 10 devices
    • Terasic SoCKit
    • Falconeye 2 HSMC Motor Control Board
    • Multiaxis Motor Control Board
  • Added support for Tandem Motion Power 48 V Board
  • Updated:
    • Compiling the µC/OS-II HPS Software
    • Creating and Booting an HPS SD Card Software Image
  • Added:
    • Creating and Booting a SD Card with both Software Image and Hardware Image
    • System Console GUI Upper Pane for the Drive-On-Chip Design Example
    • System Console GUI Lower Pane for the Drive-On-Chip Design Example
2020.11.05 3.3 Rebranded to Intel.
2019.11.07 3.2 No changes.
2019.04.18 3.1 Corrected link to iC Haus BISS interface website
June 2015 3.0
  • Added support for MAX 10 FPGA devices.
  • Updated for Altera Complete Design Suite v15.0
  • Removed support for Cyclone IV and Cyclone V (non SoC) devices.
  • Removed support for Terasic DE2115 development board
  • Updated DSP Builder model.
June 2014 2.1
  • Improved Licence Setup instructions.
  • Improved Programming the Nios II Device instructions.
February 2014 2.0
  • Added support for vibration suppression
  • Updated for the Quartus II software v13.1
May 2013 1.3
  • Added Cyclone V SoC Development Kit
  • Updated for the Quartus II software v13.0
February 2013 1.2
  • Added Cyclone V E FPGA Development Kit
  • Updated for the Quartus II software v12.1 SP1
  • Added BiSS encoder
November 2012 1.1 Added FalconEye.
August 2012 1.0 Initial release.

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