AN 669: Drive-On-Chip Design Example for Cyclone V Devices

ID 683466
Date 5/15/2022
Public
Document Table of Contents

5.1. Compiling the Drive-on-Chip Design Example

  1. Generate the Qsys System:
    1. In the Qsys software click File > Save.
    2. Click Generate HDL….
    3. Click Generate.
    4. Click Close. If your changes result in new exported connections you can view the Qsys component template by clicking Generate > Show Instantiation Template….
    5. Add new ports to the Qsys component instantiation in the top level RTL of the project <project variant>.v.
    6. Close Qsys.
  2. After changing the Qsys system, regenerate system.h:

    In a Nios II Command Shell:

    1. Run Nios II command shell from Windows start menu:Intel FPGA…/Nios II Command Shell.
    2. Type cd <project_dir>.
    3. Type make system.h. The system.h file generates in ./ software/DOC_TANDEM_CVSX/src/DriveOnChip/ directory.
  3. Compile the .sof in the Intel Quartus Prime Software; click Processing > Start Compilation.

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