Interlaken (2nd Generation) Intel® FPGA IP User Guide

ID 683396
Date 9/26/2022
Public
Document Table of Contents

1.6. Release Information

Intel® FPGA IP versions match the Intel® Quartus® Prime Design Suite software versions until v19.1. Starting in Intel® Quartus® Prime Design Suite software version 19.2, Intel® FPGA IP has a new versioning scheme.

The Intel® FPGA IP version (X.Y.Z) number can change with each Intel® Quartus® Prime software version. A change in:

  • X indicates a major revision of the IP. If you update the Intel® Quartus® Prime software, you must regenerate the IP.
  • Y indicates the IP includes new features. Regenerate your IP to include these new features.
  • Z indicates the IP includes minor changes. Regenerate your IP to include these changes.
Table 12.   Interlaken (2nd Generation) Intel® FPGA IP Core Release Information
Item Value
IP Version 20.0.3
Intel® Quartus® Prime Version 22.1
Release Date 2022.04.04
Ordering Code
Aggregate Bandwidth Ordering Code Product ID
20G to <100G IP-ILKN/50G 010E
100G to <200G IP-ILKN/100G
200G to <400G IP-ILKN/200G
Note: The ordering code for Interlaken Look-aside IP solution is same as the Interlaken (2nd Generation) Intel FPGA IP.

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