Intel® MAX® 10 Clocking and PLL User Guide

ID 683047
Date 12/26/2023
Public
Document Table of Contents
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4.2.3.3. Charge Pump and Loop Filter

You can reconfigure the following settings to update the PLL bandwidth in real time:

  • Charge pump (ICP)
  • Loop filter resistor (R)
  • Loop filter capacitor (C)
Table 8.  Charge Pump Bit Control
CP[2] CP[1] CP[0] Setting (Decimal)
0 0 0 0
0 0 1 1
0 1 1 3
1 1 1 7
Table 9.  Loop Filter Resistor Value Control
LFR[4] LFR[3] LFR[2] LFR[1] LFR[0] Setting (Decimal)
0 0 0 0 0 0
0 0 0 1 1 3
0 0 1 0 0 4
0 1 0 0 0 8
1 0 0 0 0 16
1 0 0 1 1 19
1 0 1 0 0 20
1 1 0 0 0 24
1 1 0 1 1 27
1 1 1 0 0 28
1 1 1 1 0 30
Table 10.  Loop Filter High Frequency Capacitor Control
LFC[1] LFC[0] Setting (Decimal)
0 0 0
0 1 1
1 1 3