Intel® MAX® 10 Clocking and PLL User Guide

ID 683047
Date 12/26/2023
Document Table of Contents

2.2. Internal Oscillator Architecture and Features

Intel® MAX® 10 devices have built-in internal ring oscillator with clock multiplexers and dividers. The internal ring oscillator operates up to 232 MHz which is not accessible. This operating frequency further divides down to slower frequencies.

By default internal oscillator is turned off in user mode. You can turn on the oscillator by asserting the oscena signal in the Internal Oscillator Intel® FPGA IP.

When the oscena input signal is asserted, the oscillator is enabled and the output can be routed to the logic array through the clkout output signal. When the oscena signal is set low, the clkout signal is constant high. You can analyze this delay using the Timing Analyzer.