Intel® MAX® 10 Clocking and PLL User Guide

ID 683047
Date 12/26/2023
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Document Table of Contents
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2.1.3. Clock Resources

Table 1.   Intel® MAX® 10 Clock Resources
Clock Resource Device Number of Resources Available Source of Clock Resource
Dedicated clock input pins
  • 10M02
  • 10M04
  • 10M08
8 single-ended or 4 differential CLK[3..0][p,n] pins on the left and right of the I/O banks
  • 10M16
  • 10M25
  • 10M40
  • 10M50
16 single-ended or 8 differential CLK[7..0][p,n] pins on the top, left, bottom, and right of the I/O banks
DPCLK pins All 4 DPCLK[3..0] pins on the left and right of the I/O banks

For more information about the clock input pins connections, refer to the pin connection guidelines.