Arria V Hard Processor System Technical Reference Manual

ID 683011
Date 12/02/2022
Public
Document Table of Contents

23.2. GPIO Interface Block Diagram and System Integration

The figure below shows a block diagram of the GPIO interface. The following table shows a pin table of the GPIO interface:

Figure 131. Arria V SoC GPIO
Table 210.  GPIO Interface pin table
Pin Name Mapped to GPIO Signal Name Comments
GPIO [28:0] GPIO 0 [28:0] Input / Output
GPIO [57:29] GPIO 1 [28:0] Input / Output
GPIO [70:58] GPIO 2 [12:0] Input / Output
HLGPI [13:0] GPIO 2 [26:13] Input only