Nios® V Embedded Processor Design Handbook

ID 726952
Date 12/04/2023
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4.5.2.1.3. Software Design Flow (SDM Bootloader Project)

This section provides the design flow to generate and build the SDM Bootloader project.

Creating the SDM Bootloader BSP Project

To launch the BSP Editor, follow these steps:

  1. In the Platform Designer window, select File > New BSP. The Create New BSP windows appears.
  2. For BSP setting file, navigate to the software/mailbox_bootloader/bsp folder and name the BSP as settings.bsp.

    BSP path: <project directory>/software/mailbox_bootloader/bsp/settings.bsp

  3. For System file (qsys or sopcinfo), select the Nios® V processor Platform Designer system (.qsys) file.
  4. For Quartus project, select the Quartus Project File.
  5. For Revision, select the correct revision.
  6. For CPU name, select the Nios® V processor.
  7. Select the Operating system as Altera HAL.
  8. Click Create to create the BSP file.
Figure 56. Create New BSP Window

Configuring BSP Editor and Generating the BSP Project

  1. Go to BSP Editor > Main > Settings
  2. Configure the settings per the following table:
    Table 29.  Settings for BSP Editor
    Settings Action

    hal.max_file_descriptors 5

    Input as 4

    hal.log_port 5

    Select as None

    hal.enable_exit 5

    hal.enable_clean_exit 5

    hal.c_plus_plus 5

    Unchecked to disable the feature.

    hal.sys_clk_timer 5

    hal.timerstamp_timer 5

    hal.stdin 5

    hal.stdout 5

    hal.stderr 5

    Select as None
    hal.linker

    Enable the following settings:

    • allow_code_at_reset

    • enable_alt_load

    • enable_alt_load_copy_rodata

    • enable_alt_load_copy_rwdata

    • enable_alt_load_copy_exceptions

    hal.make.cflags_user_flags 5

    Input as -ffunction-sections -fdata-sections

    hal.make.link_flags 5

    Input as -Wl,--gc-sections

    hal.make.cflags_optimization 5

    Input as -Os
    :
    Figure 57. hal Settings
    Figure 58. hal.linker Settings
    Figure 59. hal.toolchain Settings
    Figure 60. hal.make Settings
  3. Go to BSP Software Package and enable altera_safeclib
    Figure 61. BSP Software Package
  4. Click the BSP Linker Script tab in the BSP Editor.
  5. Set the .text item in the Linker Section Name to the Bootloader ROM in the Linker Region Name. Set the rest of the items in the Linker Section Name list to the Bootloader RAM.
    Figure 62. Linker Region Settings
  6. Navigate to the BSP Driver tab and disable all drivers (except the Nios V Processor and Mailbox Client Intel FPGA IP).
    Figure 63. BSP Driver tab
  7. Click Generate BSP. Make sure the BSP generation is successful.
  8. Close the BSP Editor.

Create the SDM Bootloader Application Project

  1. Download the example design files (Refer to SDM Bootloader Example Design section). You do not need to build the example design.
  2. Navigate to the sw/mailbox_bootloader/app folder in the SDM Bootloader Example Design project.
  3. Copy the SDM bootloader (mailbox_bootloader.c) into the software/mailbox_bootloader/app folder in your project.
  4. Redefine the PAYLOAD_OFFSET in mailbox_bootloader.c.
    Note: The SOF image size influences the PAYLOAD_OFFSET. The PAYLOAD_OFFSET is the start address of the Nios® V application HEX file in QSPI flash and must point to a location after the SOF image. You can determine the minimum PAYLOAD_OFFSET by using the configuration bitstream size from the device datasheet.

    For example, the estimated compressed configuration bitstream size for Intel Stratix 10 SX 2800 is 577 Mbits (72.125 MBytes). The actual size can be equal or smaller than this bitstream size. If the SOF image starts at address 0x0, the SOF image should reached until address 0x44C8FFF (0x44C8A48). With that, the minimum PAYLOAD_OFFSET you can select is 0x4500000.

  5. Launch the Nios V Command Shell.
  6. Execute the command below to generate the SDM bootloader application CMakeLists.txt.
    niosv-app --app-dir=software/mailbox_bootloader/app\
            --bsp-dir=software/mailbox_bootloader/bsp\
            --srcs=software/mailbox_bootloader/app/mailbox_bootloader.c

Building the SDM Bootloader Project

You can choose to build the SDM bootloader project using the RiscFree* IDE for Intel FPGAs, Eclipse Embedded CDT, or through the command line interface (CLI).

With the CLI , you can build the SDM bootloader using the following commands:

cmake -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release -B \
        software/mailbox_bootloader/app/release -S \ 
        software/mailbox_bootloader/app
make -C software/mailbox_bootloader/app/release

The SDM bootloader (.elf) file is created in

software/mailbox_bootloader/app/release folder.

Generating the HEX File and Initializing the Memory

A HEX file must be generated from the ELF file so that the HEX file can be used for memory initialization.

  1. Launch the Nios V Command Shell.
  2. For SDM bootloader, use the following command line to convert the ELF to HEX. This command creates the SDM bootloader (bootcopier_rom.hex) file.
elf2hex software/mailbox_bootloader/app/release/app.elf \
  -o bootcopier_rom.hex \
  -b <base address of Bootloader ROM> \
  -w <data width of Bootloader ROM in bits> \
  -e <end address of Bootloader ROM> \
  -r <data width of Bootloader ROM in bytes>

Recompile the hardware design to memory-initialize the bootcopier_rom.hex into the Bootloader ROM.

5 Intel recommends you to use these settings to reduce the SDM bootloader code footprint.