Nios® V Embedded Processor Design Handbook

ID 726952
Date 12/04/2023
Public
Document Table of Contents
Give Feedback

4. Nios® V Processor Configuration and Booting Solutions

You can configure the Nios® V processor to boot and execute software from different memory locations. The boot memory is the Quad Serial Peripheral Interface (QSPI) flash, On-Chip Memory (OCRAM), or Tightly Coupled Memory (TCM).