Nios® V Embedded Processor Design Handbook

ID 726952
Date 4/04/2022
Public

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2.1. Overview on Intel® FPGA IP and Soft-Core Processors

Intel FPGA devices can implement logic that functions as a complete microprocessor while providing many options.

An important difference between discrete microprocessors and Intel FPGA is that Intel FPGA fabric contains no logic when it powers up. Before you run software on a Nios® V based system, you must configure the Intel FPGA device with a hardware design that contains a Nios® V processor. The Nios® V processor is a soft intellectual property (IP) processor based on the RISC-V specification. You can place the Nios® V processor anywhere on the Intel FPGA, depending on the requirements of the design.

To enable your Intel® FPGA IP-based embedded system to behave as a discrete microprocessor-based system, your system should include the following:
  • A JTAG interface to support Intel FPGA configuration, hardware and software debugging
  • A power-up Intel FPGA configuration mechanism

If your system has these capabilities, you can begin refining your design from a pretested hardware design loaded in the Intel FPGA. Using an Intel FPGA also allows you to modify your design quickly to address problems or to add new functionality. You can test these new hardware designs easily by reconfiguring the Intel FPGA using your system's JTAG interface.

The JTAG interface supports hardware and software development. You can perform the following tasks using the JTAG interface:
  • Configure the Intel FPGA
  • Download and debug software
  • Communicate with the Intel FPGA through a UART-like interface (JTAG UART terminal)
  • Debug hardware (with the Signal Tap embedded logic analyzer)
  • Program flash memory

After you configure the Intel FPGA with a Nios® V processor-based design, the software development flow is similar to the flow for discrete microcontroller designs.

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