3.2. Integrating Platform Designer System into the Intel® Quartus® Prime Project
After generating the Nios® V system design in Platform Designer, perform the following tasks to integrate the Nios® V system module into the Intel® Quartus® Prime FPGA design project.
- Instantiate the Nios® V system module in the Intel® Quartus® Prime project
- Connect signals from Nios® V system module to other signals in the FPGA logic
- Assign physical pins location
- Constrain the FPGA design
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