Nios® V Embedded Processor Design Handbook

ID 726952
Date 4/04/2022

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7.4.5. Generating System Simulation Files

At this point in the design flow, you have generated your system and created all the files necessary for simulation listed in the table below. These are the necessary files required to run the simulation.
Table 20.  Files Generated for Nios V Processor Simulation
File Description
<Project directory>/sys_tb/

Platform Designer generates a testbench system when you enable the Create testbench Platform Designer system option. Platform Designer connects the corresponding Avalon Bus Functional Models to all exported interfaces of your system. For more information about Platform Designer, refer to the Intel Quartus Prime Pro Edition User Guide: Platform Designer.

<Project directory>/sys_tb/sys_tb/sim/mentor/msim_setup.tcl Sets up a QuestaSim simulation environment and creates alias commands to compile the required device libraries and system design files in the correct order and loads the toplevel design for simulation.
<Project directory>/<Memory Initialization Files>.hex Memory Initialization Files (.hex) is required to initialize memory components in your system. Use elf2hex utility to create Nios® V processor program to populate the .hex file.