ALTDQ_DQS2 Features ALTDQ_DQS2 Device Support Resource Utilization and Performance ALTDQ_DQS2 Parameter Settings ALTDQ_DQS2 Data Paths ALTDQ_DQS2 Ports Dynamic Reconfiguration for ALTDQ_DQS2 Stratix V Design Example Arria V Design Example IP-Generate Command ALTDQ_DQS2 IP Core User Guide Archives Document Revision History
I/O Configuration Block Bit Sequence for Arria V GZ and Stratix V Devices DQS Configuration Block Bit Sequence for Arria V GZ and Stratix V Devices I/O Configuration Block Bit Sequence for Arria V and Cyclone V Devices DQS Configuration Block Bit Sequence for Arria V and Cyclone V Devices Example Usage of Dynamic Reconfiguration for ALTDQ_DQS2
Side Read Operation
The side read operation is performed between 18.923 ms and 18.963 ms. The DQS agent sends data to the DQS driver with the side_readdata signal. Data validation is carried out in parallel, by comparing the side_readdata signal against the content of the check_fifo (data which was written out during the DQS write operation). If there is a mismatch, the software generates an error message.
The following figure shows the waveform for the side read operation.
Side Read Operation Waveform
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