AN 910: Intel Agilex® 7 Power Distribution Network Design Guidelines

ID 683393
Date 9/29/2023
Document Table of Contents

3.3. Remote Sense Connections

Die sense pins are provided for the core fabric voltage regulator. The voltage regulator sense line for VCC core must be connected to the differential pair sense lines or pins provided on the package. The voltage regulator feedback inputs shall be connected to this FPGA die remote sense lines.

You are required to use sense lines for Intel Agilex® 7 core, including the VID and multi-voltage designs. You are also required to add sense line to the F-Tile transceivers power rail design because of tight specifications. VCCERT1_FHT_GXF power rails have dedicated sense pins at package level.

Note: For those power rails which do not have dedicated sense pins at package level, the IR drop can still be compensated by using a voltage regulator with the sense feedback pin. To find the sense pins, you must do the IR drop analysis along with plotting power/current distribution of that specific power rail at package level to find the pins which are located further from the voltage regulator and have the maximum IR drop.
Note: Any sense line used on the board for that specific power rail must be placed before LC filter. If a sense line is placed after LC filter, it will result in oscillation to the rails and an unstable voltage that is an input to the voltage regulator feedback pin function. If the power rail is using LDO, LC filter is not required.