AN 910: Intel Agilex® 7 Power Distribution Network Design Guidelines

ID 683393
Date 9/29/2023
Document Table of Contents

5.2. PDN Design Guideline for Unused P-Tile

All P-Tile power rails (ending with _GXP) must be powered on PCB even if the P-Tile is not used in your board design. However, due to only small static/bypass current usage, the recommended decoupling capacitors in Table 14 for the P-Tile power rails in this document are not required on PCB. You must still meet the voltage specification at package pin for the P-Tile power rails by selecting a proper voltage regulator (such as low ripple, DC setpoint, recommended VR bulk capacitors, etc) and considering the static/bypass current.