1. Intel Agilex® 7 Power Distribution Network Design Guidelines Overview 2. Power Delivery Overview 3. Board Power Delivery Network Recommendations 4. Board LC Recommended Filters for Noise Reduction in Combined Power Delivery Rails 5. PCB PDN Design Guideline for Unused Tiles 6. PCB Voltage Regulator Recommendation for PCB Power Rails 7. Board Power Delivery Network Simulations 8. Intel Agilex® 7 Device Family PDN Design Summary 9. Document Revision History for AN 910: Intel Agilex® 7 Power Distribution Network Design Guidelines
188.8.131.52. Recommended Power Tree for the Intel Agilex® 7 Devices with only P-Tile and E-Tile in the Device Packages 184.108.40.206. Recommended Power Tree for the Intel Agilex® 7 AGI or AGF (with only F-Tile, or both F-Tile and R-Tile) Device Packages 220.127.116.11. Recommended Power Tree for the Intel Agilex® 7 AGM (with only F-Tile, or both F-Tile and R-Tile) Device Packages
2.4.1. Intel Agilex® 7 FPGA Packages Board-Level Decoupling Capacitors Summary 2.4.2. Intel Agilex® 7 E-Tile Board-Level Decoupling Capacitors Summary 2.4.3. Intel Agilex® 7 P-Tile Board-Level Decoupling Capacitors Summary 2.4.4. Intel Agilex® 7 F-Tile Board-Level Decoupling Capacitors Summary 2.4.5. Intel Agilex® 7 R-Tile Board-Level Decoupling Capacitors Summary
18.104.22.168. Recommended Power Tree for the Intel Agilex® 7 Devices with only P-Tile and E-Tile in the Device Packages
Figure 1. Recommended Intel Agilex® 7 AGF Devices (with only E-Tile and P-Tile) Power Tree for Production DevicesThis power tree demonstrates the recommended FPGA PCB power rails grouping. You can use any recommended voltage regulators listed in FPGA Core Fabric VCC Voltage Regulator Selection.
- This block diagram is applicable for the Intel Agilex® 7 AGF devices with E-tile and P-tile in the package.
- All power rails with naming _GXE refers to the E-tile power rails and all power rails with naming _GXP refers to the P-tile power rails.
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