Intel® FPGA SDK for OpenCL™: Intel® Arria® 10 GX FPGA Development Kit Reference Platform Porting Guide

ID 683267
Date 3/28/2022
Document Table of Contents

3.7.4. Platform Designer System Generation

The Intel® FPGA SDK for OpenCL™ Offline Compiler generates the board.qsys and kernel_system.qsys Platform Designer systems in the INTELFPGAOCLSDKROOT/board/<custom_platform>/hardware/<board_name> directory after successfully completing a first-stage compilation.

The INTELFPGAOCLSDKROOT environment variable points to the location of the Intel® FPGA SDK for OpenCL™ installation directory.

The board.qsys Platform Designer system represents the bulk of the static region. The kernel_system.qsys Platform Designer system is the top-level of the PR region. The pre_flow_pr.tcl script generates both Platform Designer systems on the fly before the beginning of the Intel® Quartus® Prime compilation flow in both the flat and import revision compilations.