Intel® FPGA SDK for OpenCL™: Intel® Arria® 10 GX FPGA Development Kit Reference Platform Porting Guide

ID 683267
Date 3/28/2022
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3.1.10.1. Host Channel IP Instantiation

In Platform Designer, the host channel IP can be instantiated from Intel® Arria® 10 board support package components in the IP catalog. The name of the IP is acl_hostchannel_top.
Table 14.  Host Channel Top Configuration Setting
IP Parameters Description
HOST_CHANNEL_DEPTH - 2048

Depth of the internal buffer that DMA transfers data to and from.

There are two buffers, and both of their depths are set by this parameter.

HOST_CHANNEL_VALID_BUFFER_USE_LAB - 0 Set to 1 to use LABs to instantiate the internal buffer, and 0 to use block RAMs.