25G Ethernet Intel® Stratix® 10 FPGA IP Design Example User Guide

ID 683252
Date 6/18/2020
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5.3. Using Transceiver Toolkit on H-Tile Production Device

If your design example targets the H-tile production device and Enable auto adaptation triggering for RX PMA CTLE/DFE mode option is turned on, you must perform additional steps to configure the register 0x343 bit[0] before you can use the Transceiver Toolkit. Refer to the description for register 0x343 in the 25G Ethernet Intel® Stratix® 10 FPGA IP User Guide for more information.

Follow these steps to use Transceiver Toolkit:
  1. Follow the procedure in the Testing the 25G Ethernet Intel® FPGA IP Design in Hardware section to load the main.tcl script.
  2. For single-channel design example, type reg_write 0x343 0x1 to hold the auto adaptation module FSM in idle state.
  3. For multi-channel design example,
    1. type reg_write 0x343 0x1 for channel 0
    2. type reg_write 0x10343 0x1 for channel 1
    3. type reg_write 0x20343 0x1 for channel 2
    4. type reg_write 0x30343 0x1 for channel 3
  4. Launch the Transceiver Toolkit.
Note: If the register 0x343 bit[0] is not set (1'b1), the transceiver channel is not visible in the Transceiver Toolkit.
Follow these steps after you already used the Transceiver Toolkit:
  1. Close the Transceiver Toolkit.
  2. For single-channel design example, type reg_write 0x343 0x0 to re-start the auto adaptation module FSM.
  3. For multi-channel design example,
    1. type reg_write 0x343 0x0 for channel 0
    2. type reg_write 0x10343 0x0 for channel 1
    3. type reg_write 0x20343 0x0 for channel 2
    4. type reg_write 0x30343 0x0 for channel 3
Note: If the register 0x343 bit[0] is cleared (1'b0) when you opened the Transceiver Toolkit, the System Console may hang.

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