25G Ethernet Intel® Stratix® 10 FPGA IP Design Example User Guide

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ID 683252
Date 6/18/2020
Public
Document Table of Contents

2.1. Features

  • Supports single Ethernet channel operating at either 10G or 25G.
  • Generate design example with IEEE 1588v2 feature.
  • Generate design example with RS-FEC feature.
  • Generates design example separately from Intel® Stratix® 10 Transceiver Native PHY.
  • Provides testbench and simulation script.

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