25G Ethernet Intel® Stratix® 10 FPGA IP Design Example User Guide

ID 683252
Date 6/18/2020
Document Table of Contents

2.5. Compilation

Follow the procedure in Compiling and Configuring the Design Example in Hardware to compile and configure the design example in the selected hardware.

You can estimate resource utilization and Fmax using the compilation-only design example. You can compile your design using the Start Compilation command on the Processing menu in the Intel® Quartus® Prime Pro Edition software. A successful compilation generates the compilation report summary.

For more information, refer to Design Compilation in the Compiler User Guide: Intel® Quartus® Prime Pro Edition .