25G Ethernet Intel® Stratix® 10 FPGA IP Design Example User Guide

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ID 683252
Date 6/18/2020
Public
Document Table of Contents

1.3.1. Procedure

You can compile and simulate the design by running a simulation script from the command prompt.
  1. At the command prompt, change the working directory to <design_example_dir>/example_testbench.
  2. Run the simulation script for the supported simulator of your choice. The script compiles and runs the testbench in the simulator.
    Table 3.  Steps to Simulate the Testbench
    Simulator Instructions
    ModelSim* In the command line, type vsim -do run_vsim.do.

    If you prefer to simulate without bringing up the ModelSim* GUI, type vsim -c -do run_vsim.do.

    Note: The ModelSim* -AE and ModelSim* -ASE simulators cannot simulate this IP core. You must use another supported ModelSim* simulator such as ModelSim* SE.
    VCS* In the command line, type sh run_vcs.sh
    NCSim In the command line, type sh run_ncsim.sh
    Xcelium* In the command line, type sh run_xcelium.sh
A successful simulation ends with the following message:
Simulation Passed.
or
Testbench complete.
After successful completion, you can analyze the results.

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