25G Ethernet Intel® Stratix® 10 FPGA IP User Guide

ID 683154
Date 9/15/2021
Public
Document Table of Contents

4.1.4.1. IP Core Preamble Processing

If you turn on Enable preamble passthrough in the parameter editor, the RX MAC forwards preamble bytes. The TX MAC requires the preamble bytes to be included in the frames at the Avalon® Streaming interface.

If you turn off Enable preamble passthrough, the IP core removes the preamble bytes. l1_rx_startofpacket is aligned to the MSB of the destination address.

Note that a single parameter in the 25G Ethernet Intel FPGA IP parameter editor turns on both RX and TX preamble passthrough.

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