1. Overview 2. Intel® Quartus® Prime Software SEU FIT Reports 3. Intel® Arria® 10 Error Detection and Correction Feature Architecture 4. Guidelines for Error Detection CRC and Error Correction Feature 5. Guidelines for Embedded Memory ECC Feature 6. Intel® Arria® 10 EDCRC Reference Design 7. Implementing ECC Feature in Intel® Arria® 10 ROM Design 8. Modifying Single-Device .jam Files for Use in a Multi-Device JTAG Chain 9. Document Revision History for AN 737: SEU Detection and Recovery in Intel® Arria® 10 Devices
6.1. System Requirements
This reference design is targeted for the following hardware and software:
- Intel® Arria® 10 development kit that is using 10AX115S2F45I2SG device.
- Intel® Quartus® Prime software version 16.0
Note: You must have a licensed version of the Intel® Quartus® Prime software to generate SMH files.
Note: You can tweak some setting in this design if you wish to test on other Intel® Arria® 10 devices. For example, you can change the device to other Intel® Arria® 10 part, set other clock source frequency, and clock source pin assignment.
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