AN 737: SEU Detection and Recovery in Intel® Arria® 10 Devices

Download
ID 683064
Date 10/21/2021
Public
Document Table of Contents

2.3. Projected SEU FIT by Component Usage Report

The Projected SEU FIT by Component Usage report shows the different components (or cell types) that comprise the total FIT rate, and SEU FIT calculation results.

An Intel FPGA's sensitivity to soft errors varies by process technology, component type, and your design choices when implementing the component (such as tradeoffs between area/delay and SEU rates). The report shows all bits (the raw FIT), utilized bits (only resources the design actually uses), and the ECC-mitigated bits.

Figure 2. Projected SEU FIT by Component Usage Report


Did you find the information on this page useful?

Characters remaining:

Feedback Message