AN 737: SEU Detection and Recovery in Intel® Arria® 10 Devices

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ID 683064
Date 10/21/2021
Public
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6.2.4.2. Quartus Prime Project Settings

To set the Intel® Quartus® Prime project setting, add the top level file, Signal Tap file and SDC file to the project, perform the following steps:

  1. Click Device at Assignments menu, and then click Device and Pin Options in Device dialog box.
  2. Under Configuration Category, select Active Serial x4 for the Configuration scheme.
  3. Under Error Detection CRC Category, check the Enable Error Detection CRC_ERROR pin.
  4. Leave Enable internal scrubbing uncheck.
    Note: You can enable Enable internal scrubbing during internal scrubbing feature tryout.
  5. Set the Divide error check frequency by list to 2.
  6. Check the Generate SEU sensitivity map file (.smh).
  7. Click OK to exit Device and Pin Options dialog box.
  8. Click OK again to exit Device dialog box.
  9. Click Settings at Assignments menu, select Files category at left panel, add top.v, top.stp and top.sdc to the project.
  10. Select TimeQuest Timing Analyzer category at left panel, add the top.sdc to SDC files to include in the project.
  11. Select Signal Tap Logic Analyzer category at left panel, check Enable Signal Tap Logic Analyzer and select the top.stp as the Signal Tap File name.
  12. Click OK to close the Settings window.
  13. Click Processing Menu, click Start > Analysis and Synthesis.

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