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1. Overview
2. Intel® Quartus® Prime Software SEU FIT Reports
3. Intel® Arria® 10 Error Detection and Correction Feature Architecture
4. Guidelines for Error Detection CRC and Error Correction Feature
5. Guidelines for Embedded Memory ECC Feature
6. Intel® Arria® 10 EDCRC Reference Design
7. Implementing ECC Feature in Intel® Arria® 10 ROM Design
8. Modifying Single-Device .jam Files for Use in a Multi-Device JTAG Chain
9. Document Revision History for AN 737: SEU Detection and Recovery in Intel® Arria® 10 Devices
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6.2.4.3. Assigning ASD Regions
This reference design uses 3 ASD regions. To assign the ASD regions, perform the following steps:
- At Project Navigator window, select Hierarchy, expand top, right click down_counter:down_counter_inst, select Design Partition, Set as Design Partition.
- Repeat step 1 for up_counter:up_counter_inst to set the Design Partition.
- In the Design Partition Window , set the Netlist Type and ASD Region for the following Partition Name:
3 You can toggle Design Partition Window on or off from Assignments menu or enter the shortcut key Alt+D.
4 To make ASD Region column visible in Design Partition Window, right click the header of the table and check ASD Region.
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