Intel® MAX® 10 Clocking and PLL User Guide

ID 683047
Date 12/26/2023
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4.1. ALTCLKCTRL Intel® FPGA IP Core

The ALTCLKCTRL IP core is a clock control function for configuring the clock control block.

The common applications of the ALTCLKCTRL IP core are as follows:

  • Dynamic clock source selection—When using the clock control block, you can select the dynamic clock source that drives the global clock network.
  • Dynamic power-down of a clock network—The dynamic clock enable or disable feature allows internal logic to power down the clock network. When a clock network is powered down, all the logic fed by that clock network is not toggling, thus reducing the overall power consumption of the device.

The ALTCLKCTRL IP core provides the following features:

  • Supports clock control block operation mode specifications
  • Supports specification of the number of input clock sources
  • Provides an active high clock enable control input