Parameterizable Macros for Intel® FPGAs User Guide

ID 772350
Date 4/10/2024
Public

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5.1.2. Synchronous Reset Synchronizer Parameterizable Macro Parameters

Table 12.  Synchronous Reset Synchronizer Parameterizable Macro Parameters
Parameter Type Allowed Values Description
RST_TYPE string

ACTIVE_HIGH

ACTIVE_LOW

Specifies ACTIVE_HIGH or ACTIVE_LOW value of the reset signal. The default value is ACTIVE_HIGH.
NUM_STAGES integer 3 to 10 Specifies the number of synchronizer stages. The default value is 3.