Parameterizable Macros for Intel® FPGAs User Guide

ID 772350
Date 4/10/2024
Public

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5.7.2. Pulse Synchronizer Parameterizable Macro Parameters

Table 24.  Pulse Synchronizer Parameterizable Macro Parameters
Parameter Type Allowed values Default value Description
NUM_STAGES Integer 3 to 10 3 Number of register stages to synchronize the signal in the destination clock domain.