Parameterizable Macros for Intel® FPGAs User Guide

ID 772350
Date 4/10/2024

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3.1. Synchronous FIFO Parameterizable Macro (sync_fifo)

In the synchronous FIFO parameterizable macro (sync_fifo), the read and write signals are synchronized to the same clock. Memory used in this macro is simple dual port RAM.

Figure 4. Synchronous FIFO Parameterizable Macro Block Diagram

This section provides the block diagrams, port descriptions, parameter tables, and instantiation templates for this parameterizable macro.