Intel® Agilex™ Device Family High-Speed Serial Interface Signal Integrity Design Guidelines

ID 683864
Date 9/26/2022
Document Table of Contents PCB Traces

  • Use stripline routing for better far end crosstalk performance and a tight impedance tolerance, and keep trace lengths shorter than the maximum allowed length limited by the full-channel IL and eye diagram simulation results.
  • Follow the general stripline pair-to-pair spacing rule of 5H for TX-to-TX and RX-to-RX, 9H for TX-to-RX, TX-to-others, and RX-to-others, where 'H' is the distance from the signal layer to the closest reference layer.
  • Use a solid ground reference for high-speed differential pairs.
  • Keep at least 5H of spacing between the edge of a trace and the void and between the edge of a trace and the edge of the reference plane in the open field area.
  • Maintain symmetrical routing between two signals that comprise a differential pair from end to end, including the trace length, the transition via location, and the placement of AC coupling capacitors. Failure to maintain routing symmetry introduces differential-to-common-mode or common-to-differential-mode conversion AC noise.
Figure 4. Symmetrical and Non-symmetrical Routing Examples
  • Breakout routing usually has a smaller trace width and smaller pair-to-pair spacing, so keep the breakout routing as short as possible to minimize reflection and insertion loss and reduce crosstalk.
  • To mitigate near end crosstalk, route the high-speed TX and RX signals on different layers, or separate the TX and RX signals with large spacing of at least 9H in the stripline layer.
  • In the BGA pin field via array, avoid high-speed traces routed between two vias that comprise a differential pair via, and make the coupling area between the high-speed trace and via as small as possible. Follow the guidelines in the following figure to minimize crosstalk in the pin field area. Each differential pair has a short bar connecting the P and N in the figure to indicate the differential via.
Figure 5. Routing Rule in Hex Pattern Pin Field Via Array
Figure 6. Breakout Routing Example of Hex Pattern BGA
  • To increase the common mode noise immunity, start differential pair P/N deskew at the transmitter, end deskew at the receiver, and compensate for the skew after the skew happens and close to the point where the variation occurs.
Figure 7. Intrapair Deskew Close to the Skew Happening Location
  • Minimize serpentine layouts, making them transparent to the signal, because serpentine layouts introduce discontinuity to the differential channel. You can minimize them by making electrical lengths shorter than the signal rise time. In general, keep the serpentine routing length <100 mils with arcs and bends of 45 degrees. A loosely coupled differential pair is less affected by serpentine lines.
Figure 8. Deskew Trombone Routing Rule
  • Do not use tightly coupled high-speed differential pairs for a given routing density because they increases the impedance fluctuation caused by the deskew trombone and manufacturing tolerance. The general rule for intra-pair spacing is between one and two times the trace width.
  • Use arc routing for high-speed differential traces.
  • Use teardrop traces for high-speed differential traces in the pad and via area.
  • Mitigate the fiber weave effect with techniques like zig-zag routing and image rotation (see below).

The following figure shows zig-zag routing. If the weave is aligned to the PCB edges, follow a zig-zag routing of differential traces. Generally, maintain a minimum angle of 10 degrees between the trace and fiber weave; thee angles are relative to the PCB edge. For more details about the fiber weave effect, refer to AN 528: PCB Dielectric Material Selection and Fiber Weave Effect on High-Speed Channel Routing.

Figure 9. Zig-Zag Routing

Another solution is image rotation that maintains an angle between the trace and the fiber weave pattern. Rotate until the traces are at a 10 degree angle relative to the fiber weave. Rotate by cutting the PCB at an angle, as shown in following figure, or by rotating the layout relative to the edge of the PCB.

Figure 10. Cutting the PCB Board to Rotate the Image Relative to the Fiber Weave Pattern

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