Intel Agilex® 7 Device Family High-Speed Serial Interface Signal Integrity Design Guidelines

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ID 683864
Date 6/15/2023
Public
Document Table of Contents
Document Table of Contents x
1. Signal Integrity (SI) in High-Speed PCB Designs
1. Signal Integrity (SI) in High-Speed PCB Designs x
1.1. Supported Protocols 1.2. Channel Insertion Loss (IL) Budget Calculation 1.3. PCB Materials and Stackup Design Guidelines 1.4. PCB Design Guidelines 1.5. Document Revision History for the Intel Agilex® 7 Device Family High-Speed Serial Interface Signal Integrity Design Guidelines
1.3. PCB Materials and Stackup Design Guidelines x
1.3.1. Mitigating Insertion Loss with Dielectric Material 1.3.2. Power Layers 1.3.3. Reference Planes 1.3.4. Layer Assignment 1.3.5. Impedance 1.3.6. Via Drill Size 1.3.7. Fiber Weave 1.3.8. Reference Stackup
1.4. PCB Design Guidelines x
1.4.1. General PCB Design Guidelines 1.4.2. E-Tile PCB Design Guidelines 1.4.3. F-Tile PCB Design Guidelines 1.4.4. P-Tile PCB Design Guidelines 1.4.5. R-Tile PCB Guidelines
1.4.1. General PCB Design Guidelines x
1.4.1.1. PCB Traces 1.4.1.2. PCB Vias 1.4.1.3. Connector Breakout 1.4.1.4. AC Coupling Capacitor 1.4.1.5. Others
1.4.3. F-Tile PCB Design Guidelines x
1.4.3.1. F-Tile Features and Capabilities 1.4.3.2. Optimizing the Passive Channel 1.4.3.3. COM Simulations 1.4.3.4. Simulating the Active Channel
1.4.5. R-Tile PCB Guidelines x
1.4.5.1. R-Tiles Features and Capabilities 1.4.5.2. R-Tile Design Layout Examples 1.4.5.3. Landing Pad Cut-out Optimization of AC Coupling Capacitor 1.4.5.4. R-tile HSSI Breakout Routing in BGA Field Area and MCIO connector Pin Area 1.4.5.5. AC Coupling Capacitor Placement Around MCIO Connector 1.4.5.6. PCIe Gen5 Add-in Card Edge Finger Breakout Design Guidelines
1. Signal Integrity (SI) in High-Speed PCB Designs

1.4.3.3. COM Simulations

Channel operating margin (COM) is a standardized method of determining the overall figure of merit of a channel. Some of the traditional channel parameters like IL, RL, ICN/ICR(integrated crosstalk noise/ratio) are informative only. COM is a single value in dB derived using the MATLAB code.

The COM calculation code is a built-in feature for most of the commercial channel simulation tools. You can run and get the results directly from these tools. Refer to the IEEE 802.3 website to get the latest COM code and configuration file. The configuration file is different for different applications (VSR, MR, LR). Read through protocol spec to get the most suitable one based on the target application.

Figure 23. Example COM Simulation Results

Typically, COM simulation needs to run two cases: a long package case and a short package case, which represent the worst-case package parameters defined in the protocol specification for TX and RX devices. You can also use the device package model to replace these predefined parameters for more accurate results. COM simulation can report channel COM and ERL (effective return loss, refer to 802.3 spec for details) data in dB. You need to compare it with the mask defined in the protocol specification. Different applications define different masks, typically 3dB for COM and 10dB for ERL. Passing these specifications means the designed channel is protocol compliant, and the larger the data values, the more margin the channel has. Intel strongly suggest you run COM simulation to make sure the designed board channel can meet the protocol specification. Optimize the channel and calculate the channel design margin based on COM and ERL results.

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