18.104.22.168. R-Tiles Features and Capabilities 22.214.171.124. R-Tile Design Layout Examples 126.96.36.199. Landing Pad Cut-out Optimization of AC Coupling Capacitor 188.8.131.52. R-tile HSSI Breakout Routing in BGA Field Area and MCIO connector Pin Area 184.108.40.206. AC Coupling Capacitor Placement Around MCIO Connector 220.127.116.11. PCIe Gen5 Add-in Card Edge Finger Breakout Design Guidelines
- Strictly control the impedance tolerance of high-speed traces. Generally, 10% can be used for stripline impedance, but 7% is better, especially for the 112G PAM4 signals.
- Breakout routing usually has limited routing space which may cause impedance discontinuity. Optimize breakout routing trace geometries to reduce the impedance discontinuity for better return loss performance.
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