Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 10/29/2021
Public

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Document Table of Contents

2.1.2. Root Port Mode

  • PCIe Gen3 x16/x8 in Intel® Stratix® 10 GX and Intel® Stratix® 10 MX devices
  • PCIe Gen4/Gen3 x16 in Intel® Stratix® 10 DX and Intel® Agilex™ devices
  • Configuration Slave (CS) interface for accessing Endpoint’s config space
  • User mode options:
    • Bursting Avalon Master (BAM)
    • Bursting Avalon Slave (BAS)
    • BAM and BAS
  • Maximum payload size is 512 bytes

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