3.5. Hard IP Reconfiguration Interface
The Hard IP Reconfiguration Interface (usr_hip_reconfig_*) is supported on H-Tile, F-Tile and P-Tile. The Hard IP Reconfiguration interface is an Avalon-MM slave interface with a 21-bit address bus and an 8-bit data bus. You can use this bus to dynamically modify the value of configuration registers. This interface can be used in Endpoint and Root Port modes. It must be enabled if Root Port mode is selected. When you select Root Port mode, the IP Parameter Editor automatically enables this interface. In Root Port mode, the application logic uses the Hard IP reconfiguration interface to access its PCIe configuration space to perform link control functions such as Hot Reset, Link Disable or Link Retrain.
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