Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 10/29/2021
Public

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3.1.3.1. Metadata Support

8 Byte Metadata

In Avalon Streaming mode, once you select 8 Byte metadata support during IP generation, the source and destination address field in the existing descriptor structure are repurposed for metadata support. The following fields of the existing descriptor defined above have revised properties.

Table 15.  
Name Width Description

SRC_ADDR[63:0]

64

If Link bit =0, then this field contains the source address.

If the queue is H2D, then this field contains the address in Host Memory. If the queue is D2H, then this is 8 Byte Metadata

If the link bit is set, then this contains the address of the next 4KB page in host memory containing the descriptors.

DEST_ADDR[127:64]

64

Provided link=0, this field means:

If the queue is D2H, then this field contains the address in Host Memory. If the queue is H2D, then this is 8 Byte Metadata

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