Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 10/29/2021
Public

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12. Revision History for Multi Channel DMA Intel FPGA IP for PCI Express User Guide

Date Intel® Quartus® Prime Version IP Version Changes
2021.10.29 21.3

21.2.0 [H-Tile]

2.1.0 [P-Tile]

1.0.0 [F-Tile]

2021.08.16 21.2

21.1.0 [H-Tile]

2.0.0 [P-Tile]

  • Fixed H-Tile IP revision number
  • Added 500 MHz support for P-Tile MCDMA IP
  • Added P-Tile single port Avalon-ST DMA up to 256 channels
  • Added MCDMA IP DPDK Poll-Mode based Driver
  • Added MCDMA IP Kernel Mode (No SRIOV) Driver
2021.05.28 21.1

2.0.0 [H-Tile]

1.0.0 [P-Tile]

  • PCIe Gen4 (P-Tile) Support
  • Support for x8 link width
  • MCDMA 1 port AVST interface
  • BAM, BAS, BAM+BAS, BAM+MCDMA modes
  • SR-IOV support
  • Root Port support (IP only)
  • Config Slave interface for RP
2020.07.20 20.2

20.0.0 (H-Tile)

Initial Release

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