Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 10/29/2021

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Document Table of Contents Descriptor Memory Management

At the time of channel initialization, the device allocates the descriptor and data memory.

Descriptor memory

Maximum length of data in descriptor is 1 MB. Link specifies whether the next descriptor is in any other page.

AVST H2D/D2H descriptor
  • source address
  • Destination address
  • Data length
  • Start of file (SOF)
  • End of file (EOF)
  • Descriptor index
  • Link

Application need to pass these values to the hardware through the libmqdma.

Data Memory

The user space data page can be much bigger than the normal TLB entry page size of 4 KB. libqdma library implements the allocator to organize the memory.

Following are the hardware registers which the software updates as part of the channel enumeration.
  • Q_START_ADDR_L, Q_START_ADDR_H: Contains the physical address of the start of the descriptor array.
  • Q_SIZE: Logarithmic value of number of descriptors
  • Q_CONS_HEAD_ADDR_L, Q_CONS_HEAD_ADDR_H: Physical address of the head index of the ring, where FPGA sync the value of the head.