Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 10/29/2021
Public

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4.6. Bursting Avalon-MM Slave (BAS) Interface

Table 32.  BAS Signals
Signal Name I/O Type Description
bas_vfactive_i Input When asserted, this signal indicates AVMM transaction is targeting a virtual function

H-Tile: bas_pfnum_i[1:0]

P-Tile and F-Tile: bas_pfnum_i[2:0]

Input Specifies a target PF number
bas_vfnum_i[10:0] Input Specifies a target VF number
bas_address_i[63:0] Input Represents a byte address. The value of address must align to the data width.

x16: bas_byteenable_i[63:0]

x8: bas_byteenable_i[31:0]

Input Enables one or more specific byte lanes during transfers on interfaces

x16: bas_burstcount_i[3:0]

x8: bas_burstcount_i[4:0]

Input Used by a bursting master to indicate the number of transfers in each burst.
bas_read_i Input Asserted to indicate a read transfer.

x16: bas_readdata_o[511:0]

x8: bas_readdata_o[255:0]

Output Read data to the user logic in response to a read transfer
bas_readdatavalid_o Output When asserted, indicates that the readdata signal contains valid data. For a read burst with burstcount value <n>, the readdatavalid signal must be asserted <n> times, once for each readdata item.
bas_write_i Input Asserted to indicate a write transfer

x16: bas_writedata_i[511:0]

x8: bas_writedata_i[255:0]

Input Data for write transfers
bas_waitrequest_o Output When asserted, indicates that the Avalon-MM slave is not ready to respond to a request.
bas_response_o[1:0] Output
Carries the response status:
  • 00: OKAY. Successful response for a transaction.
  • 01: RESERVED. Encoding is reserved.
  • 10: SLAVEERROR. Error from an endpoint agent. Indicates an unsuccessful transaction.
  • 11: DECODEERROR. Indicates attempted access to an undefined location.

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