Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 10/29/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

6.2.4.4. PCIe0 DEV SER

Table 60.  PCIe0 DEV SER
Parameter Value Default Value Description

Enable Device Serial Number Capability

On / Off

Off

Capability Enable Device Serial Number Capability (DEV SER)

Device Serial Number (DW1) 32 bits 0x0000000000000000

Set the lower 32 bits of the IEEE 64-bit Device Serial Number (DW1)

Device Serial Number (DW2) 32 bits 0x0000000000000000

Set the upper 32 bits of the IEEE 64-bit Device Serial Number (DW2)