Multi Channel DMA Intel® FPGA IP for PCI Express User Guide

ID 683821
Date 10/29/2021
Public

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Document Table of Contents

4.10. Configuration Intercept Interface (EP Only)

For detailed information about this interface, refer to
  • P-Tile Avalon Streaming Intel FPGA IP for PCI Express User Guide [Configuration Intercept Interface (EP Only) Section 4.11]
  • F-Tile Avalon Streaming Intel FPGA IP for PCI Express User Guide [Configuration Intercept Interface (EP Only) Section 3.9 and Section 5.11]
.