1.8. Preserving Signals for Debugging
To ensure that specific nodes in your RTL are available for debugging after the Compiler's synthesis and place-and-route stages, you can apply the preserve_for_debug attribute to the signals of interest in your RTL, and also apply the Enable preserve for debug assignments project-level .qsf assignment.
This section refers to the following terms to explain use of the preserve for debug feature:
A signal name present in your design RTL and possibly in the compilation netlist for the current project. Typically, the node name refers to the output of a logical unit, such as gate, register, LUT, embedded memory, DSP, or others.
The Intel® Quartus® Prime GUI can display this node name in various locations, such as the Node Finder, when debugging the signals in your design. You can search for this node name to apply constraints and use in debugging operations.
|hpath||The Intel® Quartus® Prime-style hierarchical path, with instance names separated by "|", for example:foo|boo|node|
Did you find the information on this page useful?