Intel® Quartus® Prime Pro Edition User Guide: Debug Tools

ID 683819
Date 7/08/2022
Public

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7.7. MATLAB* and Simulink* in a System Verification Flow

You can test system development in System Console using MATLAB* and Simulink*, and set up a system verification flow using the Intel FPGA Hardware in the Loop (HIL) tools. In this approach, you deploy the design hardware to run in real time, and simulate the system's surrounding components in a software environment. The HIL approach allows you to use the flexibility of software tools with the real-world accuracy and speed of hardware. You can gradually introduce more hardware components to the system verification testbench. This technique gives you more control over the integration process as you tune and validate the system. When the full system is integrated, the HIL approach allows you to provide stimuli via software to test the system under a variety of scenarios.

Advantages of HIL Approach

  • Avoid long computational delays for algorithms with high processing rates
  • API helps to control, debug, visualize, and verify FPGA designs all within the MATLAB* environment
  • FPGA results are read back by the MATLAB* software for further analysis and display

Required Tools and Components

  • MATLAB* software
  • DSP Builder for Intel® FPGAs software
  • Intel® Quartus® Prime software
  • Intel FPGA
Note: The DSP Builder for Intel® FPGAs installation bundle includes the System Console MATLAB* API.
Figure 122. Hardware in the Loop Host-Target Setup

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