Intel® Quartus® Prime Pro Edition User Guide: Debug Tools

ID 683819
Date 7/08/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.2. Signal Tap Debugging Flow

To use the Signal Tap logic analyzer to debug your design, you compile your design that includes one or more Signal Tap instances that you define, configure the target device, and then run the logic analyzer to capture and analyze signal data.

Figure 21.  Signal Tap Debugging Flow

The following steps describe the Signal Tap debugging flow in detail: