Intel® Quartus® Prime Pro Edition User Guide: Debug Tools

ID 683819
Date 10/13/2021
Public

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2.8.2.1. Continuous Mode and a Storage Qualifier Examples

The following show the capture differences between a non-segmented buffer in continuous mode and a non-segmented buffer using a storage qualifier. The configuration of the logic analyzer waveforms is a base trigger condition, sample depth of 64 bits, and Post trigger position.

Figure 83.  Signal Tap Logic Analyzer Continuous Data Capture

In the continuous data capture, Trig1 occurs several times in the data buffer before the Signal Tap logic analyzer trigger activates. The buffer must be full before the logic analyzer evaluates any trigger condition. After the trigger condition occurs, the logic analyzer continues acquisition for eight additional samples (12% of the buffer, as defined by the "post-trigger" position).

Figure 84.  Signal Tap Logic Analyzer Conditional Data Capture

Note to figure:

  1. Conditional capture, storage always enabled, post-fill count.
  2. The Signal Tap logic analyzer captures a recurring pattern using a non-segmented buffer in conditional mode. The configuration of the logic analyzer is a basic trigger condition "Trig1" and sample depth of 64 bits. The Trigger in condition is Don't care, so the buffer captures all samples.

In conditional capture the logic analyzer triggers immediately. As in continuous capture, the logic analyzer completes the acquisition with eight samples, or 12% of 64, the sample capacity of the acquisition buffer.