External Memory Interfaces Stratix® 10 FPGA IP User Guide

ID 683741
Date 4/01/2024
Document Table of Contents

3.5.1. I/O SSM Sharing

The I/O SSM contains a hardened processor and dedicated memory storing the calibration software code and data.

When a column contains multiple memory interfaces, the hardened processor calibrates each interface serially. Interfaces placed within the same I/O column always share the same I/O SSM. The Quartus® Prime Fitter handles I/O SSM sharing automatically.