External Memory Interfaces Stratix® 10 FPGA IP User Guide

ID 683741
Date 4/01/2024
Document Table of Contents Generating a Design Example with the Debug Toolkit

To enable the Debug Toolkit in the example design, open the parameter editor for your EMIF IP, and complete the following steps.

  1. Open the parameter editor by selecting External Memory Interface Stratix® 10 FPGA IP from the IP Catalog.
  2. Open the Diagnostics tab of the parameter editor.
  3. Select Quartus Prime EMIF Debug Toolkit/On-Chip Debug Port > Add EMIF Debug Interface.
  4. Select Enable In-System Sources and Probes.
  5. Parameterize the interface to your requirements,
  6. Click Generate Example Design.
The system configures the generated design with the Debug Toolkit enabled and all components connected as required for a single interface.