External Memory Interfaces Stratix® 10 FPGA IP User Guide

ID 683741
Date 4/01/2024
Document Table of Contents Enabling the Efficiency Monitor in a Design Example

To enable the Efficiency Monitor, follow these steps.
In the Performance group on the Diagnostics tab in the parameter editor, set Efficiency Monitor Mode to one of the following values:
  • Export: Allows you to connect your own RTL logic to control the Efficiency Monitor and read status registers.
  • Interface to Efficiency Monitor Toolkit: Allows use of a unified toolkit GUI in the System Console. To use the Efficiency Monitor with the Unified Debug Toolkit instead of the legacy External Memory Interface Debug Toolkit, check the Use Efficiency Monitor with Unified Toolkit option. Refer to Opening the Efficiency Monitor Toolkit for more information.
Figure 161. Efficiency Monitor Mode Setting