1.3.4. Implementing Page in the Flash .pof
The total number of pages and the size of each page depends on the density of the flash. These pages allow you to store designs for different FPGA chains or different designs for the same FPGA chain in different pages.
Use the generated .sof files to create a flash memory device .pof. When converting these .sof files to a .pof, use the following address modes to determine the page address:
- Block mode—Allows you to specify the start and end addresses for the page.
- Start mode—Allows you to specify only the start address. You can locate the start address for each page on an 8-KB boundary. If the first valid start address is 0×000000, the next valid start address is an increment of 0×2000.
- Auto mode—Allows the Intel® Quartus® Prime software to automatically determine the start address of the page. The Intel® Quartus® Prime software aligns the pages on a 128-KB boundary; for example, if the first valid start address is 0×000000, the next valid start address is an increment of 0×20000.